Identificacion Principal del registro INGC-EBK-000066

Control Number Identifier AR-LpUFI

LAST MODIFICATION DATE 20160826095734

CONTROL FIELD cr nn 008mamaa

CONTROL FIELD 131008s2014 xxu| s |||| 0|eng d

a International Standard Book Number 9781461442745

a Standard number or code 10.1007/978-1-4614-4274-5

a Personal name Tatas, Konstantinos.

a Title Designing 2D and 3D Network-on-Chip Architectures

h Medium [libro electrónico] /

c Statement of responsibility, etc by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch.

a Place of publication, distribution, etc New York, NY :

b Name of publisher, distributor, etc Springer New York :

b Name of publisher, distributor, etc Imprint: Springer,

c Date of publication, distribution, etc 2014.

a Extent xiii, 265 p. :

b Other physical details il.

a Formatted contents note Part I: Network-on-Chip Design Methodology -- Network-on-Chip Technology: A Paradigm Shift -- NoC Modeling and Topology Exploration -- Communication Architecture -- Power and Thermal Effects and Management -- NoC-based System Integration -- NoC Verification and Testing -- The Spidergon STNoC -- Middleware Memory Management in NoC -- On Designing 3-D Platforms -- The SYSMANTIC NoC Design and Prototyping Framework -- Part II: Suggested Projects.-  Projects on Network-on Chip.

a Summary, etc This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect.  It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools.  Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliabilty.  Case studies are used to illuminate new design methodologies.  ·         Describes essential theory, practice and state-of-the-art applications of 2D and 3D Network-on-Chip interconnect; ·         Enables readers to exploit parallelism in processor architecture, with interconnect design that is efficient in terms of energy and performance; ·         Covers topics not available in other books, such as NoC and distributed memory organization, dynamic memory management and abstract data type support in many-core platforms, and distributed hierarchical power management.

a Topical term or geographic name as entry element Engineering.

a Topical term or geographic name as entry element Microprocessors.

a Topical term or geographic name as entry element Electronics.

a Topical term or geographic name as entry element Microelectronics.

a Topical term or geographic name as entry element Electronic circuits.

a Topical term or geographic name as entry element Circuits and Systems.

a Topical term or geographic name as entry element Instrumentation.

a Topical term or geographic name as entry element Processor Architectures.

a Personal name Siozios, Kostas.

a Personal name Soudris, Dimitrios.

a Personal name Jantsch, Axel.

u Uniform Resource Identifier (R) http://dx.doi.org/10.1007/978-1-4614-4274-5

c item type EBK

a descripción COM