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Biblioteca Julio Castiñeiras. Sistema de Información Integrado - Facultad de Ingeniería UNLP
Facultad de Ingeniería | 115 esq.47 | Horario: Lunes a Viernes 8 a 19 hs.
E-mail: bibcentral@ing.unlp.edu.ar
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Información bibliografica (registro INGC-EBK-000152) |
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Título: |
Design Exploration of Emerging Nano-scale Non-volatile Memory by Hao Yu, Yuhao Wang. |
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Autor:
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Yu, Hao.
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Otros autores: |
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Wang, Yuhao.
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Editado por: |
Springer New York :;Imprint: Springer,
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Año de publicación: |
2014.
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Lugar de publicación: |
New York, NY :
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Descripción física: |
x, 192 p. : il. |
ISBN: |
9781493905515
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Materias: |
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Electronics. |
Microelectronics. |
Electronic circuits. |
Circuits and Systems. |
Instrumentation. |
Semiconductors. |
Engineering. |
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Notas: |
Introduction -- Fundamentals of NVM Physics and Computing -- Non-volatile State Identification and NVM SPICE -- Non-volatile Circuit Design -- Non-volatile Memory Computing System. |
Sumario: |
This book presents the latest techniques for characterization, modeling and design for nano-scale non-volatile memory (NVM) devices. Coverage focuses on fundamental NVM device fabrication and characterization, internal state identification of memristic dynamics with physics modeling, NVM circuit design, and hybrid NVM memory system design-space optimization. The authors discuss design methodologies for nano-scale NVM devices from a circuits/systems perspective, including the general foundations for the fundamental memristic dynamics in NVM devices. Coverage includes physical modeling, as well as the development of a platform to explore novel hybrid CMOS and NVM circuit and system design.  â_¢Â Offers readers a systematic and comprehensive treatment of emerging nano-scale non-volatile memory (NVM) devices; â_¢Â Focuses on the internal state of NVM memristic dynamics, novel NVM readout and memory cell circuit design, and hybrid NVM memory system optimization; â_¢Â Provides both theoretical analysis and practical examples to illustrate design methodologies; â_¢Â Illustrates design and analysis for recent developments in spin-toque-transfer, domain-wall racetrack and memristors. |
URL: |
http://dx.doi.org/10.1007/978-1-4939-0551-5
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Tapa y contenido (Amazon.com) |
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