| |
 |
Biblioteca Julio Castiñeiras. Sistema de Información Integrado - Facultad de Ingeniería UNLP
Facultad de Ingeniería | 115 esq.47 | Horario: Lunes a Viernes 8 a 19 hs.
E-mail: bibcentral@ing.unlp.edu.ar
|
|
|
|
|
|
|
|
|
|
|
Información bibliografica (registro INGC-EBK-000066) |
|
|
|
Título: |
Designing 2D and 3D Network-on-Chip Architectures by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch. |
|
Autor:
|
Tatas, Konstantinos.
|
Otros autores: |
|
Siozios, Kostas.
|
Soudris, Dimitrios.
|
Jantsch, Axel.
|
|
Editado por: |
Springer New York :;Imprint: Springer,
|
Año de publicación: |
2014.
|
Lugar de publicación: |
New York, NY :
|
Descripción física: |
xiii, 265 p. : il. |
ISBN: |
9781461442745
|
Materias: |
|
Electronics. |
Microelectronics. |
Electronic circuits. |
Circuits and Systems. |
Instrumentation. |
Processor Architectures. |
Microprocessors. |
Engineering. |
|
Notas: |
Part I: Network-on-Chip Design Methodology -- Network-on-Chip Technology: A Paradigm Shift -- NoC Modeling and Topology Exploration -- Communication Architecture -- Power and Thermal Effects and Management -- NoC-based System Integration -- NoC Verification and Testing -- The Spidergon STNoC -- Middleware Memory Management in NoC -- On Designing 3-D Platforms -- The SYSMANTIC NoC Design and Prototyping Framework -- Part II: Suggested Projects.-Â Projects on Network-on Chip. |
Sumario: |
This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliabilty. Case studies are used to illuminate new design methodologies. ·        Describes essential theory, practice and state-of-the-art applications of 2D and 3D Network-on-Chip interconnect; ·        Enables readers to exploit parallelism in processor architecture, with interconnect design that is efficient in terms of energy and performance; ·        Covers topics not available in other books, such as NoC and distributed memory organization, dynamic memory management and abstract data type support in many-core platforms, and distributed hierarchical power management. |
URL: |
http://dx.doi.org/10.1007/978-1-4614-4274-5
|
|
|
Tapa y contenido (Amazon.com) |
|
|
El software empleado por esta biblioteca esta basado en el
Koha
Software OSS para gestion de Bibliotecas, y cumple estándares internacionales de informacion web
Número de visitantes:
|
|
|
